Semiconductor Engineering

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat ...
Semiconductor Engineering

SW-HW Framework: Graphic Rendering on RISC-V GPUs (Georgia Tech, Cal Poly)

A new technical paper titled “Skybox: Open-Source Graphic Rendering on Programmable RISC-V GPUs” was published by researchers at Georgia Tech, California Polytechnic State University-San Luis Obispo.
Design-Reuse

MEEP: An HPC Systems Development Platform for RISC-V Based HW/SW Co-Design

BARCELONA, Spain, September 22, 2023 – After three and a half years of research, the European-funded Marenostrum Experimental Exascale Platform (MEEP) project has successfully concluded its mission of ...
BetaNews

How RISC-V standards are changing the world [Q&A]

You may have heard of RISC-V -- usually pronounced 'risk-five' -- it's an instruction set architecture originally designed to support computer architecture research and education but which has evolved ...
ZDNet

RISC-V, the Linux of the chip world, is starting to produce technological breakthroughs

“The potential was always there” for innovation in chip design, said Dr. David Patterson, co-creator of the open standard chip instructions known as RISC-V. “Maybe because of all the competition, we ...
TechRepublic

RISC-V: What it is, and what benefits it can provide to your organization

RISC-V is an instruction set architecture for processors that offers innovative operational mechanisms. Learn about its background and the advantages it brings. RISC-V is an instruction set ...